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Formal Methods Researcher for ZK

Veridise

Veridise

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Austin, TX, USA
Posted 6+ months ago
  • Enhance and extend Veridise’s core ZK tooling, including Picus, ZK Vanguard, and the LLZK circuit IR.
  • Develop novel methodologies to improve the usability and scalability of Veridise’s ZK tools for complex circuits.
  • Design and implement generic circuit transformations, analyses, and optimizations within LLZK, along with formal verification methodologies to ensure their correctness.
  • Work closely with the engineering and audit teams to integrate verification techniques into our security tooling.
  • Conduct research, publish findings, and contribute to the academic and industry community on formal verification for cryptographic security.

This job is no longer accepting applications

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